P89LPC912/913/914
8-bit microcontrollers with two-clock 80C51 core
1 kB 3 V Flash with 128-byte RAM
Rev. 03 — 17 December 2004
Product data
1. General description
The P89LPC912/913/914 are single-chip microcontrollers in low-cost 14-pin
packages, based on a high performance processor architecture that executes
instructions in two to four clocks, six times the rate of standard 80C51 devices. Many
system level functions have been incorporated into the P89LPC912/913/914 in order
to reduce component count, board space, and system cost.
2. Features
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s 1 kB byte-erasable Flash code memory organized into 256-byte sectors and
16-byte pages. Single-byte erasing allows any byte(s) to be used as non-volatile
data storage.
s 128-byte RAM data memory.
s Two 16-bit counter/timers. Each timer may be configured to toggle a port output
upon timer overflow or to become a PWM output.
s 23-bit system timer that can also be used as a Real-Time clock.
s Two analog comparators with selectable inputs and reference source.
s Enhanced UART with fractional baudrate generator, break detect, framing error
detection, automatic address detection and versatile interrupt capabilities
(P89LPC913, P89LPC914).
s SPI communication port.
s Internal RC oscillator (factory calibrated to ±1 %) option allows operation without
external oscillator components. The RC oscillator option is selectable and fine
tunable.
s 2.4 V to 3.6 V VDD operating range. I/O pins are 5 V tolerant (may be pulled up or
driven to 5.5 V).
s Up to 12 I/O pins when using internal oscillator and reset options.
3. Additional features
• 14-pin TSSOP packages.
• A high performance 80C51 CPU provides instruction cycle times of 111 ns to
222 ns for all instructions except multiply and divide when executing at 18 MHz
(167 ns to 333 ns at 12 MHz). This is six times the performance of the standard
80C51 running at the same clock frequency. A lower clock frequency for the same
performance results in power savings and reduced EMI.
• In-Application Programming (IAP-Lite) and byte erase allows code memory to be
used for non-volatile data storage.
