P89LPC907 Datasheet | NXP Semiconductors

description The P89LPC906/907/908 are single-chip microcontrollers in low-cost 8-pin packages, based on a high performance processor architecture that executes instructions in two to four clocks, six times the rate of standard 80C51 devices. Many system-level functions have been incorporated into the P89LPC906/907/908 in order to reduce ponent count, board space, and system cost. 2. Features 2.1 Principal features s 1 k B byte-erasable Flash code memory organized into 256-byte sectors and 16-byte pages. Single-byte erasing allows any byte(s) to be used as non-volatile data storage. s 128-byte RAM data memory. s Two 16-bit counter/timers. (Timer 0 may be configured to toggle a port output upon timer overflow or to bee a PWM output on the P89LPC907 device). s 23-bit system timer that can also be used as a Real-Time clock. s A single analog parator with selectable reference source. s Enhanced UART with fractional baudrate generator, break detect, framing error detection, automatic address detection and versatile interrupt capabilities (P89LPC908, transmit only on P89LPC907). s Internal RC oscillator option (factory calibrated to ±1 %) allows operation without external oscillator ponents. The RC oscillator option is selectable and fine tunable. s 2.4 V to 3.6 V VDD operating range with 5 V tolerant I/O pins (may be pulled up or driven to 5.5 V). Supply pins located at package centers for improved supply decoupling and reduced EMI. s Up to six I/O pins when using internal oscillator and reset options. s 8-pin SO-8 package. 2.2 Additional features s A high performance 80C51 CPU provides instruction cycle times of 111 ns to 222 ns for all instructions except multiply and divide when executing at 18 MHz (P89LPC906) (167 ns to 333 ns at 12 MHz). This is six times the performance of the standard 80C51 running at the same clock frequency. A lower clock frequency for the same performance results in power savings and reduced EMI. s In-Application Programming (IAP-Lite) and byte...