LPC2930 Datasheet (PDF) Download
NXP Semiconductors
LPC2930

Description

The LPC2930 bine an ARM968E-S CPU core with two integrated TCM blocks operating at frequencies of up to 125 MHz, Full-speed USB 2.0 Host/OTG/Device controller, CAN and LIN, 56 kB SRAM, external memory interface, three 10-bit ADCs, and multiple serial and parallel interfaces in a single chip targeted at consumer, industrial, and munication markets.

Key Features

  • ARM968E-S processor running at frequencies of up to 125 MHz maximum
  • Multilayer AHB system bus at 125 MHz with four separate layers
  • External Static Memory Controller (SMC) with eight memory banks; up to 32-bit data bus; up to 24-bit address bus
  • Up to 152 general-purpose I/O pins with programmable pull-up, pull-down, or bus keeper
  • Vectored Interrupt Controller (VIC) with 16 priority levels
  • Up to 22 level-sensitive external interrupt pins, including USB, CAN and LIN wake-up features
  • Processor wake-up from power-down via external interrupt pins, CAN, or LIN activity
  • Configurable clock-out pin for driving external system clocks
  • Flexible Reset Generator Unit (RGU) able to control resets of individual modules
  • Second, dedicated CGU with its own PLL generates USB clocks and a co