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ADC1206S055 - (ADC1206S040 - ADC1206S070) Single 12 bits ADC

Download the ADC1206S055 datasheet PDF. This datasheet also covers the ADC1206S040 variant, as both devices belong to the same (adc1206s040 - adc1206s070) single 12 bits adc family and are provided as variant models within a single manufacturer datasheet.

Description

The ADC1206S040/055/070 are a family of BiCMOS 12-bit Analog-to-Digital Converters (ADC) optimized for a wide range of applications such as cellular infrastructures, professional telecommunications, imaging, and digital radio.

Features

  • I I I I I I I I I I I I I I I I 12-bit resolution Sampling rate up to 70 MHz.
  • 3 dB bandwidth of 245 MHz 5 V power supplies and 3.3 V output power supply Binary or twos complement CMOS outputs In-range CMOS compatible output TTL and CMOS compatible static digital inputs TTL and CMOS compatible digital outputs Differential AC or Positive Emitter-Coupled Logic (PECL) clock input; TTL compatible Power dissipation 550 mW (typical) Low analog input capacitance (typical 2 pF), no buffer amplifie.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (ADC1206S040_NXPSemiconductors.pdf) that lists specifications for multiple related part numbers.

Datasheet Details

Part number ADC1206S055
Manufacturer NXP Semiconductors
File Size 560.73 KB
Description (ADC1206S040 - ADC1206S070) Single 12 bits ADC
Datasheet download datasheet ADC1206S055 Datasheet

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Other Datasheets by NXP Semiconductors

Part Number Description
ADC1206S040 (ADC1206S040 - ADC1206S070) Single 12 bits ADC
ADC1206S070 (ADC1206S040 - ADC1206S070) Single 12 bits ADC
ADC1207S080 Single 12 bits ADC
ADC1210S Single 12-bit ADC
ADC1213D Dual 12-bit ADC

Full PDF Text Transcription

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ADC1206S040/055/070 Rev. 02 — 12 August 2008 www.DataSheet4U.com Single 12 bits ADC, up to 40 MHz, 55 MHz or 70 MHz Product data sheet 1. General description The ADC1206S040/055/070 are a family of BiCMOS 12-bit Analog-to-Digital Converters (ADC) optimized for a wide range of applications such as cellular infrastructures, professional telecommunications, imaging, and digital radio. It converts the analog input signal into 12-bit binary coded digital words at a maximum sampling rate of 70 MHz. All static digital inputs (SH, CE and OTC) are Transistor-Transistor Logic (TTL) and CMOS compatible and all outputs are CMOS compatible. A sine wave clock input signal can also be used. 2.
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