74LVC3G07 buffer equivalent, triple buffer.
s s s s Wide supply voltage range from 1.65 V to 5.5 V 5 V tolerant input/output for interfacing with 5 V logic High noise immunity Complies with JEDEC standard: x JESD8-.
using Ioff. The Ioff circuitry disables the output, preventing the damaging backflow current through the device when it i.
The 74LVC3G07 is a high-performance, low-power, low-voltage, Si-gate CMOS device and superior to most advanced CMOS compatible TTL families. Input can be driven from either 3.3 V or 5 V devices. This feature allows the use of this device in a mixed 3.
Image gallery
TAGS
Manufacturer
Related datasheet
Download (Size : 108.68KB)