74LVC1G175 flip-flop equivalent, single d-type flip-flop.
* Wide supply voltage range from 1.65 V to 5.5 V
* 5 V tolerant inputs for interfacing with 5 V logic
* High noise immunity
* Complies with JEDEC standard.
using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it .
The 74LVC1G175 is a low-power, low-voltage single positive edge triggered D-type flip-flop with individual data (D) input, clock (CP) input, master reset (MR) input, and Q output.
The master reset (MR) is an asynchronous active LOW input and operates.
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