S32R264 Overview
NXP Semiconductors Data Sheet: Technical Data S32R274/S32R264 Series Data Sheet Supports S32R274K, S32R274J, S32R264K and S32R264J • On-chip modules available within the device include the following features: • Safety core: Power Architecture® e200Z4 32-bit CPU with checker core • Dual issue putation cores: Power Architecture® e200Z7 32-bit CPU • 2 MB on-chip code flash (FMC flash) with ECC
S32R264 Key Features
- On-chip modules available within the device include the following features
- Safety core: Power Architecture® e200Z4 32-bit CPU with checker core
- Dual issue putation cores: Power Architecture® e200Z7 32-bit CPU
- 2 MB on-chip code flash (FMC flash) with ECC
- 1.5 MB on-chip SRAM with ECC
- RADAR processing
- Signal Processing Toolbox (SPT) for RADAR signal processing acceleration
- Cross Timing Engine (CTE) for precise timing generation and triggering
- Waveform generation module (WGM) for chirp ramp generation
- 4x 12-bit ΣΔ-ADC with 10 MSps
S32R264 Applications
- FCCU for fault collection and fault handling
- MEMU for memory error management