PTN3460I
Description
PTN3460I is an (embedded) DisplayPort to LVDS bridge device that enables connectivity between an (embedded) DisplayPort (eDP) source and LVDS display panel. It processes the ining DisplayPort (DP) stream, performs DP to LVDS protocol conversion and transmits processed stream in LVDS format.
Key Features
- Embedded microcontroller and on-chip Non-Volatile Memory (NVM) allow for flexibility in firmware updates
- LVDS panel power-up (/down) sequencing control
- Firmware controlled panel power-up (/down) sequence timing parameters
- No external timing reference needed
- eDP plying PWM signal generation or PWM signal pass through from eDP source 2.2 DisplayPort receiver features
- compliant to DP v1.2a and v1.1a
- compliant to eDP v1.2 and v1.1
- Supports Main Link operation with one or two lanes (select through configuration pin CFG3, see Table 4 for more details)
- Supports Main Link rate: Reduced Bit Rate (1.62 Gbit/s) and High Bit Rate (2.7 Gbit/s)
- Supports 1 Mbit/s AUX channel Supports Native AUX and I2C-over-AUX transactions
