PN7642
Overview
This document describes the functionality and electrical specification of the NFC open controller PN7642. Additional documents supporting a design-in of the PN7642 are available from NXP, this additional design-in information is not part of this document.
- Running at a frequency of up to 90 MHz
- Arm Cortex M33 built-in nested vectored interrupt controller (NVIC)
- Non-maskable interrupt (NMI) input with a selection of sources
- Serial wire debug with breakpoints and watch points. Includes serial wire output for enhanced debug capabilities.
- System tick timer
- up to 21 GPIOs (6 dedicated GPIOs)
- On-chip memory - 256 kB flash memory (180 kB available to the user) - 32 kB RAM (20 kB available to the user)
- Security - Symmetric crypto accelerator - Asymmetric crypto accelerator - Secure key storage for symmetric keys - Refer to Section 9.12.3 for information about how to replace the factory default keys with custom keys - Secure boot support - Key transfer unit to transfer symmetric keys between key store and crypto engine, without involvement of the CPU
- Serial interfaces - I2C controller 1 - SPI controller 1 Updated the terms "master/slave" to "controller/target" to align with the recommendation of the
