PHX23NQ10T Datasheet | NXP Semiconductors

FEATURES - ’Trench’ technology - Low on-state resistance - Fast switching SYMBOL d QUICK REFERENCE DATA VDSS = 100 V ID = 13 A g RDS(ON) ≤ 70 mΩ s GENERAL DESCRIPTION N-channel enhancement mode field-effect power transistor in a plastic full pack envelope using ’trench’ technology. Applications:- d.c. to d.c. converters - switched mode power supplies - T.V. and puter monitor power supplies The PHX23NQ10T is supplied in the SOT186A (FPAK) conventional leaded package. PINNING PIN 1 2 3 case DESCRIPTION gate drain source isolated SOT186A (FPAK) case 1 2 3 LIMITING VALUES Limiting values in accordance with the Absolute Maximum System (IEC 134) SYMBOL PARAMETER VDSS VDGR VGS ID IDM PD Tj, Tstg Drain-source voltage Drain-gate voltage Gate-source voltage Continuous drain current Pulsed drain current Total power dissipation Operating junction and storage temperature CONDITIONS Tj = 25 ˚C to 150˚C Tj = 25 ˚C to 150˚C; RGS = 20 kΩ Tmb = 25 ˚C; VGS = 10 V Tmb = 100 ˚C; VGS = 10 V Tmb = 25 ˚C Tmb = 25 ˚C MIN. - 55 MAX. 100 100 ± 20 13 8 52 27 150 UNIT V V V A A A W ˚C September 1999 Rev 1.000 Philips Semiconductors Product specification N-channel Trench MOS™ transistor AVALANCHE ENERGY LIMITING VALUES Limiting values in accordance with the Absolute Maximum System (IEC 134) SYMBOL PARAMETER EAS Non-repetitive avalanche energy Peak non-repetitive avalanche current CONDITIONS Unclamped inductive load, IAS = 14 A; tp = 100 µs; Tj prior to avalanche = 25˚C; VDD ≤ 25 V; RGS = 50 Ω; VGS = 10 V; refer to fig:15 MIN. MAX. 93 UNIT m J - 23 THERMAL RESISTANCES SYMBOL PARAMETER Rth j-mb Rth j-a Thermal resistance junction to mounting base Thermal resistance junction to ambient CONDITIONS MIN. SOT186a package, in free air TYP. MAX. UNIT 55 4.6 K/W K/W ELECTRICAL CHARACTERISTICS Tj= 25˚C unless otherwise specified SYMBOL PARAMETER V(BR)DSS VGS(TO) RDS(ON) IGSS IDSS Qg(tot) Qgs Qgd td on tr td off tf Ld Ls Ciss Coss Crss Drain-source breakdown voltage...