PHP212L Datasheet | NXP Semiconductors

FEATURES - High-speed switching - No secondary breakdown - Very low on-state resistance - Low threshold. APPLICATIONS - Motor and actuator driver - Power management - Synchronized rectification. DESCRIPTION Two P-channel enhancement mode MOS transistors in an 8-pin plastic SOT96-1 (SO8) package. CAUTION The device is supplied in an antistatic package. The gate-source input must be protected against static discharge during transport or handling. 1 4 s1 g 1 handbook, halfpage PINNING - SOT96-1 (SO8) PIN 1 2 3 4 5 6 7 8 SYMBOL s1 g1 s2 g2 d2 d2 d1 d1 DESCRIPTION source 1 gate 1 source 2 gate 2 drain 2 drain 2 drain 1 drain 1 d1 d1 5 d2 d2 MAM119 s2 g Fig.1 Simplified outline and symbol. QUICK REFERENCE DATA SYMBOL VDS VSD VGS VGSth ID RDSon Ptot PARAMETER drain-source voltage (DC) source-drain diode forward voltage gate-source voltage (DC) gate-source threshold voltage drain current (DC) drain-source on-state resistance total power dissipation ID = - 1 m A; VDS = VGS Ts = 80 °C ID = - 2 A; VGS = - 4.5 V Ts = 80 °C IS = - 1.25 A CONDITIONS - - - - 0.5 - - - MIN. MAX. - 30 - 1.3 ±12 - 1.1 - 4 0.12 3.5 V V V V A Ω W UNIT 1997 Jun 20 Philips Semiconductors Objective specification Dual P-channel enhancement mode MOS transistor LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 134). SYMBOL Per P-channel VDS VGS ID IDM Ptot drain-source voltage (DC) gate-source voltage (DC) drain current (DC) peak drain current total power dissipation Ts = 80 °C; note 1 note 2 Ts = 80 °C; note 3 Tamb = 25 °C; note 4 Tamb = 25 °C; note 5 Tamb = 25 °C; note 6 Tstg Tj IS ISM Notes 1. Ts is the temperature at the soldering point of the drain lead. 2. Pulse width and duty cycle limited by maximum junction temperature. storage temperature operating junction temperature Ts = 80 °C note 2 - - - - - - - - -...