PHP152NQ03LTA Datasheet | NXP Semiconductors

Description Logic level N-channel enhancement mode field-effect transistor in a plastic package using Trench MOS™ technology. 1.2 Features s Logic level threshold s Low gate charge s Low on-state resistance s Low thermal resistance. 1.3 Applications s DC-to-DC converters s Switched-mode power supplies. 1.4 Quick reference data s VDS ≤ 25 V s Ptot ≤ 150 W s ID ≤ 75 A s RDSon ≤ 4 mΩ. 2. Pinning information Table 1: 1 2 3 mb Pinning - SOT78 (TO-220AB) and SOT404 (D2-PAK), simplified outlines and symbol Simplified outline [1] Pin Description gate (g) drain (d) source (s) mounting base; connected to drain (d) Symbol mb d mb g s MBB076 2 1 MBK106 MBK116 1 2 3 SOT78 (TO-220AB) [1] It is not possible to make connection to pin 2 of the SOT404 package. SOT404 (D2-PAK) Philips Semiconductors PHP/B152NQ03LTA N-channel Trench MOS™ logic level FET 3. Ordering information Table 2: Ordering information Package Name PHP152NQ03LTA PHB152NQ03LTA TO-220AB D2-PAK Description Version Plastic single-ended package; heatsink mounted; 1 mounting hole; 3 leads SOT78 Plastic single-ended surface mounted package; 3 leads (one lead cropped) SOT404 Type number 4. Limiting values Table 3: Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter VDS VDGR VGS ID IDM Ptot Tstg Tj IS ISM drain-source voltage (DC) drain-gate voltage (DC) gate-source voltage drain current (DC) peak drain current total power dissipation storage temperature junction temperature source (diode forward) current (DC) Tmb = 25 °C peak source (diode forward) current Tmb = 25 °C; pulsed; tp ≤ 10 µs unclamped inductive load; ID = 75 A; tp = 0.46 ms; VDD ≤ 25 V; RGS = 50 Ω; VGS = 10 V; starting Tj = 25 °C Tmb = 25 °C; VGS = 10 V; Figure 2 and 3 Tmb = 100 °C; VGS = 10 V; Figure 2 Tmb = 25 °C; pulsed; tp ≤ 10 µs; Figure 3 Tmb = 25 °C; Figure 1 Conditions 25 °C ≤ Tj ≤ 175 °C 25 °C ≤ Tj ≤ 175 °C; RGS = 20 kΩ Min - 55 - 55 Max 25 25 ±20 75 75 240 150 +175 +175 75 240 560 Unit V...