PHN103 Datasheet | NXP Semiconductors

FEATURES - High-speed switching - No secondary breakdown - Very low on-state resistance. APPLICATIONS - Motor and actuator driver - Power management - Synchronized rectification. DESCRIPTION N-channel enhancement mode MOS transistor in an 8-pin plastic SOT96-1 (SO8) package. CAUTION The device is supplied in an antistatic package. The gate-source input must be protected against static discharge during transport or handling. 1 4 n.c. s handbook, halfpage PINNING - SOT96-1 (SO8) PIN 1 2 3 4 5 6 7 8 SYMBOL n.c s s g d d d d source source gate drain drain drain drain DESCRIPTION not connected d 5 d d d MAM116 s g Fig.1 Simplified outline and symbol. QUICK REFERENCE DATA SYMBOL VDS VSD VGS VGSth ID RDSon Ptot PARAMETER drain-source voltage (DC) source-drain diode forward voltage gate-source voltage (DC) gate-source threshold voltage drain current (DC) drain-source on-state resistance total power dissipation ID = 1 m A; VDS = VGS Ts = 80 °C ID = 5.5 A; VGS = 10 V Ts = 80 °C IS = 1.25 A CONDITIONS - - - 1 - - - MIN. 1 ±20 2.8 8.5 0.03 4 MAX. 30 V V V V A Ω W UNIT 1997 Jun 20 Philips Semiconductors Product specification N-channel enhancement mode MOS transistor LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 134). SYMBOL VDS VGS ID IDM Ptot PARAMETER drain-source voltage (DC) gate-source voltage (DC) drain current (DC) peak drain current total power dissipation Ts = 80 °C; note 1 note 2 Ts = 80 °C Tamb = 25 °C; note 3 Tamb = 25 °C; note 4 Tstg Tj IS ISM Notes 1. Ts is the temperature at the soldering point of the drain lead. 2. Pulse width and duty cycle limited by maximum junction temperature. 3. Device mounted on printed-circuit board with an Rth a-tp (ambient to tie-point) of 27.5 K/W. 4. Device mounted on printed-circuit board with an Rth a-tp (ambient to tie-point) of 90 K/W. THERMAL CHARACTERISTICS SYMBOL Rth j-s PARAMETER thermal resistance from junction to soldering point VALUE 17.5 storage temperature operating...