PHF9NQ20 Datasheet | NXP Semiconductors

Description

N-channel, enhancement mode field-effect power transistor using Trench technology, intended for use in off-line switched mode power supplies, T.V. and computer monitor power supplies, d.c. to d.c. converters, motor control circuits and general purpose switching applications. The PHX9NQ20T is supplied in the SOT186A (FPAK) conventional leaded package PINNING PIN 1 2 3 case gate drain source isolated DESCRIPTION SOT186A (FPAK) case SOT186 (FPAK) case 1 2 3 1 2 3 LIMITING VALUES Limiting values in accordance with the Absolute Maximum System (IEC 134) SYMBOL PARAMETER VDSS VDGR VGS ID IDM PD Tj, Tstg Drain-source voltage Drain-gate voltage Gate-source voltage Continuous drain current Pulsed drain current Total power dissipation Operating junction and storage temperature CONDITIONS Tj = 25 ˚C to 175˚C Tj = 25 ˚C to 175˚C; RGS = 20 kΩ Ths = 25 ˚C; VGS = 10 V Ths = 100 ˚C; VGS = 10 V Ths = 25 ˚C Ths = 25 ˚C MIN. - 55 MAX. 200 200 ± 20 5.2 3.3 21 25 150 UNIT V V V A A A W ˚C November 2000 1 Philips Semiconductors Product specification N-channel TrenchMOS transistor PHX9NQ20T , PHF9NQ20T AVALANCHE ENERGY LIMITING VALUES Limiting values in accordance with the Absolute Maximum System (IEC 134) SYMBOL PARAMETER EAS Non-repetitive avalanche energy Peak non-repetitive avalanche current CONDITIONS Unclamped inductive load, IAS = 7.2A; tp = 100 µs; Tj prior to avalanche = 25˚C; VDD ≤ 25 V; RGS = 50 Ω; VGS = 10 V; refer to fig;15 MIN.