PDTA114EE Datasheet | NXP Semiconductors

FEATURES - Built-in bias resistors R1 and R2 (typ. 10 kΩ each) - Simplification of circuit design - Reduces number of ponents and board space. APPLICATIONS - Especially suitable for space reduction in interface and driver circuits - Inverter circuit configurations without use of external resistors. DESCRIPTION PNP resistor-equipped transistor in an SC-75 plastic package. NPN plement: PDTC114EE. PINNING PIN 1 2 3 DESCRIPTION base/input emitter/ground (+) collector/output MGA893 - 1 PDTA114EE handbook, halfpage 3 R1 1 R2 1 Top view MAM345 Fig.1 Simplified outline (SC-75) and symbol. MARKING TYPE NUMBER PDTA114EE MARKING CODE 03 Fig.2 Equivalent inverter symbol. QUICK REFERENCE DATA SYMBOL VCEO IO ICM Ptot h FE R1 R2 -----R1 PARAMETER collector-emitter voltage output current (DC) peak collector current total power dissipation DC current gain input resistor resistor ratio Tamb ≤ 25 °C IC = - 5 m A; VCE = - 5 V CONDITIONS open base - - - - 30 7 0.8 MIN. - - - - - 10 1 TYP. MAX. - 50 - 100 - 100 150 - 13 1.2 kΩ UNIT V m A m A m W 1998 Jul 23 Philips Semiconductors Preliminary...