Datasheet Details
| Part number | PCK2509SA |
|---|---|
| Manufacturer | NXP |
| File Size | 79.03 KB |
| Description | 50-150 MHz 1:9 SDRAM clock driver |
| Datasheet |
 PCK2509SA Datasheet
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| Part number | PCK2509SA |
|---|---|
| Manufacturer | NXP |
| File Size | 79.03 KB |
| Description | 50-150 MHz 1:9 SDRAM clock driver |
| Datasheet |
PCK2509SA Datasheet
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The PCK2509SA is a high-performance, low-skew, low-jitter, phase-locked loop (PLL) clock driver.
It uses a PLL to precisely align, in both frequency and phase, the feedback (FBOUT) output to the clock (CLK) input signal.
It is specifically designed for use with synchronous DRAMs.