• Part: PCK111
  • Description: Low voltage 1:10 differential PECL clock driver
  • Manufacturer: NXP Semiconductors
  • Size: 65.59 KB
Download PCK111 Datasheet PDF
NXP Semiconductors
PCK111
FEATURES - 100 ps part-to-part skew typical - 35 ps output-to-output skew typical - Differential design - VBB output - Low voltage VCC range of +2.375 V to +3.8 V for PECL - 75 kΩ input pull-down resistors - ECL/PECL outputs - Form, fit, and function patible with MC100EP111 DESCRIPTION The PCK111 is a low skew 1-to-10 differential driver, designed with clock distribution in mind. It accepts two clock sources into an input multiplexer. The PECL input signals can be either differential or single-ended if the VBB output is used. The selected signal is fanned out to 10 identical differential outputs. The PCK111 is specifically designed, modeled and produced with low skew as the key goal. Optimal design and layout serve to minimize gate-to-gate skew within a device, and empirical modeling is used to determine process control limits that ensure consistent t PD distributions from lot to lot. The net result is a dependable, guaranteed low skew device. To ensure that the tight skew...