PCF5077T
Key Features
- CMOS low-voltage, low-power
- Can be used in burst mode with power-down
- 3-wire serial bus interface with the bus available in Power-down mode
- On-chip ramp generator for 256 different power levels with two dynamic ranges
- Two programmable regulator start conditions (VKICK and VHOME)
- Programmable analog output voltage limitation
- Ramping speed depending on the 13 MHz system frequency clock for Global System for Mobile communications (GSM) and Personal Communications Network (PCN)
- Low swing input buffer for the 13 MHz master clock
- Compatible to a large number of different RF power modules QUICK REFERENCE DATA SYMBOL VDDD VDDA1 VDDA2 IDD(oper)(tot) Tamb Notes PARAMETER digital supply voltage analog supply voltage 1 analog supply voltage 2 (for OP4) total operating current on the VDD pins operating ambient temperature note 2 CONDITIONS note 1 note 1 MIN. 2.7 2.7 2.7 - -40 TYP. 3.0 3.0 5.0 9 - PCF5077T
- Programmable temperature matching
