PCA9515
description
The PCA9515 is a Bi CMOS integrated circuit intended for application in I2C-bus and SMBus systems.
While retaining all the operating modes and features of the I2C-bus system, it permits extension of the I2C-bus by buffering both the data (SDAn) and the clock (SCLn) lines, thus enabling two buses of 400 p F.
The I2C-bus capacitance limit of 400 p F restricts the number of devices and bus length. Using the PCA9515 enables the system designer to isolate two halves of a bus, thus more devices or longer length can be acmodated. It can also be used to run two buses, one at 5 V and the other at 3.3 V or a 400 k Hz and 100 k Hz bus, where the 100 k Hz bus is isolated when 400 k Hz operation of the other is required.
Two or more PCA9515s cannot be put in series. The PCA9515 design does not allow this configuration. Since there is no direction pin, slightly different ‘legal’ low voltage levels are used to avoid lock-up conditions between the input and the output. A ‘regular low’ applied at...
