Datasheet4U Logo Datasheet4U.com

PC74HC4353 - Triple 2-channel analog multiplexer/demultiplexer

General Description

The 74HC4053; 74HCT4053 is a high-speed Si-gate CMOS device and is pin compatible with the HEF4053B.

It is specified in compliance with JEDEC standard no.

7A.

Key Features

  • Wide analog input voltage range from 5 V to +5 V.
  • Low ON resistance:.
  • 80  (typical) at VCC  VEE = 4.5 V.
  • 70  (typical) at VCC  VEE = 6.0 V.
  • 60  (typical) at VCC  VEE = 9.0 V.
  • Logic level translation: to enable 5 V logic to communicate with 5 V analog signals.
  • Typical ‘break before make’ built-in.
  • ESD protection:.
  • HBM JESD22-A114F exceeds 2000 V.
  • MM JESD22-A115-A exceeds 200 V.
  • CDM JESD22-C101E exceeds 1000 V.
  • Multiple package o.

📥 Download Datasheet

📁 Similar Datasheet

Part Number Description Manufacturer
PC74HCT02 Quad 2 Input NOR Gate Philips
PC740 40 Amp Power Relay Picker
PC7410 PowerPC 7410 RISC Microprocessor ATMEL Corporation
PC7447 (PC7447 / PC7457) PowerPC 7457 RISC Microprocessor ATMEL Corporation
PC7447A PowerPC RISC microprocessor ATMEL Corporation

Other Datasheets by NXP Semiconductors

Part Number Description
PC74HC4351 Analog Multiplexer/Demultiplexer
PC74HC4352 Analog Multiplexer/Demultiplexer
PC74HC4316 Quad Bilateral Switches
PC74HC4002 Dual 4-Input NOR Gate
PC74HC40102 8-Bit Synchronous BCD Down Counter

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
74HC4053; 74HCT4053 Triple 2-channel analog multiplexer/demultiplexer Rev. 8 — 19 July 2012 Product data sheet 1. General description The 74HC4053; 74HCT4053 is a high-speed Si-gate CMOS device and is pin compatible with the HEF4053B. It is specified in compliance with JEDEC standard no. 7A. The 74HC4053; 74HCT4053 is triple 2-channel analog multiplexer/demultiplexer with a common enable input (E). Each multiplexer/demultiplexer has two independent inputs/outputs (nY0 and nY1), a common input/output (nZ) and three digital select inputs (Sn). With E LOW, one of the two switches is selected (low-impedance ON-state) by S1 to S3. With E HIGH, all switches are in the high-impedance OFF-state, independent of S1 to S3.