Download P83C524 Datasheet PDF
NXP Semiconductors
P83C524
FEATURES GENERAL DESCRIPTION QUICK REFERENCE DATA ORDERING INFORMATION BLOCK DIAGRAM FUNCTIONAL DIAGRAM PINNING INFORMATION Pinning Pin description FUNCTIONAL DESCRIPTION General Instruction Set Execution MEMORY ORGANIZATION Program Memory Internal Data Memory Addressing I/O FACILITIES TIMERS/COUNTERS Timer 0 and Timer 1 Timer/Counter Mode Control register (TMOD) Timer/Counter Control Register (TCON) Timer 2 Timer 2 Control Register (T2CON) Capture Mode Automatic Reload Mode Baud Rate Generator Mode Watchdog Timer T3 SERIAL PORT (UART) Serial Port Control Register (SCON) SM0 and SM1 operating modes (SCON) BIT-LEVEL I2C INTERFACE I2C Interrupt Register (S1INT) Single-bit Data Register with I2C Auto-clock (S1BIT) Reading or Writing the S1BIT SFR Control and Status Register for the I2C-bus (S1SCS) INTERRUPT SYSTEM Interrupt Enable Register (IE) Interrupt Priority Register (IP) Interrupt Vectors 15 15.1 15.2 15.3 15.4 16 17 17.1 18 19 20 21 21.1 21.2 22 23 24 25 25.1 26 27 27.1 27.2...