P80CE598
FEATURES
GENERAL DESCRIPTION
Electromagnetic patibility (EMC) Remendation on ALE ORDERING INFORMATION BLOCK DIAGRAM PINNING FUNCTIONAL DESCRIPTION
MEMORY ORGANIZATION Program Memory Internal Data Memory External Data Memory I/O PORT STRUCTURE PULSE WIDTH MODULATED OUTPUTS (PWM) Prescaler frequency control register (PWMP) Pulse Width Register 0 (PWM0) Pulse Width Register 1 (PWM1) ANALOG-TO-DIGITAL CONVERTER (ADC) ADC Control register (ADCON) TIMERS/COUNTERS Timer 0 and Timer 1 Timer T2 Capture and pare Logic Watchdog Timer (T3) SERIAL I/O PORT: SIO0 (UART) SERIAL I/O PORT: SIO1 (CAN) On-chip CAN-controller CAN Features
Interface between CPU and CAN Hardware blocks of the CAN-controller Control Segment and Message Buffer description
CAN 2.0A Protocol description
23 24 24.1 24.2 24.3 24.4 25 26 14 14.1 14.2 14.3 15 15.1 15.2 15.3 15.4 16 17 17.1 18 18.1 18.2 19 20 21 22 22.1 22.2 INTERRUPT SYSTEM
P8x CE598
Interrupt Enable and Priority Registers Interrupt Vectors Interrupt Priority...
