P80C552 Datasheet | NXP Semiconductors

Features - 80C51 central processing unit - 8k × 8 ROM expandable externally to 64k bytes - - - - I2C-bus serial I/O port with byte oriented master and slave functions Full-duplex UART patible with the standard 80C51 On-chip watchdog timer Three speed ranges: - 3.5 to 16MHz - 3.5 to 24MHz (ROM, ROMless only) - 3.5 to 30MHz (ROM, ROMless only) - - - - - - - - ROM code protection An additional 16-bit timer/counter coupled to four capture registers and three pare registers Two standard 16-bit timer/counters 256 × 8 RAM, expandable externally to 64k bytes Capable of producing eight synchronized, timed outputs A 10-bit ADC with eight multiplexed analog inputs Two 8-bit resolution, pulse width modulation outputs Five 8-bit I/O ports plus one 8-bit input port shared with analog inputs DESCRIPTION The 80C552/83C552 (hereafter generically referred to as 8XC552) Single-Chip 8-Bit Microcontroller is manufactured in an advanced CMOS process and is a derivative of the 80C51 microcontroller family. The 8XC552 has the same instruction set as the 80C51. Three versions of the derivative exist: - 83C552- 8k bytes mask programmable ROM - Three operating ambient temperature ranges: - P83C552x Bx: 0°C to +70°C - P83C552x Fx: - 40°C to +85°C (XTAL frequency max. 24 MHz) - P83C552x Hx: - 40°C to +125°C (XTAL frequency max. 16 MHz) - - 80C552- ROMless version of the 83C552 87C552- 8k bytes EPROM (described in a separate chapter) In addition, the 8XC552 has two software selectable modes of power reduction- idle mode and power-down mode. The idle mode freezes the CPU while allowing the RAM, timers, serial ports, and interrupt system to continue functioning. The power-down mode saves the RAM contents but freezes the oscillator, causing all other chip functions to be inoperative. The device also functions as an arithmetic processor having facilities for both binary and BCD arithmetic plus bit-handling capabilities. The instruction set consists of over 100 instructions: 49 one-byte, 45...