Download P80C552 Datasheet PDF
NXP Semiconductors
P80C552
FEATURES - 80C51 central processing unit - 8k × 8 ROM expandable externally to 64k bytes - - - - I2C-bus serial I/O port with byte oriented master and slave functions Full-duplex UART patible with the standard 80C51 On-chip watchdog timer Three speed ranges: - 3.5 to 16MHz - 3.5 to 24MHz (ROM, ROMless only) - 3.5 to 30MHz (ROM, ROMless only) - - - - - - - - ROM code protection An additional 16-bit timer/counter coupled to four capture registers and three pare registers Two standard 16-bit timer/counters 256 × 8 RAM, expandable externally to 64k bytes Capable of producing eight synchronized, timed outputs A 10-bit ADC with eight multiplexed analog inputs Two 8-bit resolution, pulse width modulation outputs Five 8-bit I/O ports plus one 8-bit input port shared with analog inputs DESCRIPTION The 80C552/83C552 (hereafter generically referred to as 8XC552) Single-Chip 8-Bit Microcontroller is manufactured in an advanced CMOS process and is a derivative of the 80C51 microcontroller...