P617A Overview
Description
The PCA9617A is a CMOS integrated circuit that provides level shifting between low voltage (0.8 V to 5.5 V) and higher voltage (2.2 V to 5.5 V) Fast-mode Plus (Fm+) I2C-bus or SMBus applications. While retaining all the operating modes and features of the I2C-bus system during the level shifts, it also permits extension of the I2C-bus by providing bidirectional buffering for both the data (SDA) and the clock (SCL) lines, thus enabling two buses of 540 pF at 1 MHz or up to 4000 pF at lower speeds.
Key Features
- Using the PCA9617A enables the system designer to isolate two halves of a bus for both voltage and capacitance
- The SDA and SCL pins are overvoltage tolerant and are high-impedance when the PCA9617A is unpowered
- The PCA9617A drivers are not enabled unless VCC(A) is above 0.8 V and VCC(B) is above 2.2 V
- The EN pin is referenced to VCC(B) and can also be used to turn the drivers on and off under system control
- Caution should be observed to only change the state of the enable pin when the bus is idle
- The output pull-down on the port B internal
