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HEF4012B - Dual 4-input NAND gate

Description

The HEF4012B provides the positive dual 4-input NAND function.

The outputs are fully buffered for highest noise immunity and pattern insensitivity of output impedance.

Fig.2 Pinning diagram.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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INTEGRATED CIRCUITS DATA SHEET For a complete data sheet, please also download: • The IC04 LOCMOS HE4000B Logic Family Specifications HEF, HEC • The IC04 LOCMOS HE4000B Logic Package Outlines/Information HEF, HEC HEF4012B gates Dual 4-input NAND gate Product specification File under Integrated Circuits, IC04 January 1995 Philips Semiconductors Product specification Dual 4-input NAND gate DESCRIPTION The HEF4012B provides the positive dual 4-input NAND function. The outputs are fully buffered for highest noise immunity and pattern insensitivity of output impedance. HEF4012B gates Fig.2 Pinning diagram. Fig.1 Functional diagram.
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