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NXP Semiconductors Electronic Components Datasheet

CBT6832 Datasheet

INTEGRATED CIRCUITS

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INTEGRATED CIRCUITS
CBT6820
20-bit bus switch with precharged outputs
and Schottky undershoot protection for
live insertion
Product specification
1999 Apr 05
Philips
Semiconductors


NXP Semiconductors Electronic Components Datasheet

CBT6832 Datasheet

INTEGRATED CIRCUITS

No Preview Available !

Philips Semiconductors
20-bit bus switch with precharged outputs and
Schottky undershoot protection for live insertion
Product specification
CBT6820
FEATURES
TTL compatible inputs and outputs
5switch connection between two port A and port B
Thin shrink small outline (TSSOP)
Undershoot protection included to prevent shoot through level
changes
Bias voltage pre-charges the outputs to minimize signal distortion
during live insertion
DESCRIPTION
The CBT6820 provides twenty bits of high-speed TTL-compatible
bus switching. The low on-state resistance of the switch allows
bi-directional connections to be made while adding near-zero
propagation delay. The device also precharges the B port to a
user-selectable bias voltage (BIASV) to minimize live-insertion
noise.
The device is organized as two 10-bit switch with individual enable
(OE) input. When OE is low, the switch is on and port A is
connected to port B. When OE is high, the switch between port A
and port B is open and the B port is precharged to BIASV through
the equivalent of a 10-kresistor.
Special clamp circuitry and Schottky diode clamps to ground are
used to prevent an under voltage on the A side (Vin < GND) from
causing the B side precharge voltage to drop below the ‘‘1” state.
PIN CONFIGURATION
BIASV 1
1A1 2
1A2 3
1A3 4
1A4 5
1A5 6
1A6 7
GND 8
1A7 9
1A8 10
1A9 11
1A10 12
2A1 13
2A2 14
VCC 15
2A3 16
GND 17
2A4 18
2A5 19
2A6 20
2A7 21
2A8 22
2A9 23
2A10 24
48 1OE
47 2OE
46 1B1
45 1B2
44 1B3
43 1B4
42 1B5
41 GND
40 1B6
39 1B7
38 1B8
37 1B9
36 1B10
35 2B1
34 2B2
33 2B3
32 GND
31 2B4
30 2B5
29 2B6
28 2B7
27 2B8
26 2B9
25 2B10
QUICK REFERENCE DATA
SYMBOL
PARAMETER
tPLH/tPHL
CIN
CI/O
Propagation delay
An to Bn or Bn to An
Input capacitance
Input/output capacitance
CONDITIONS
Tamb = 25°C; GND = 0V
CL = 50 pF, VCC = 5 V
Outputs disabled; VO = 0 V or VCC
SA00520
TYPICAL
0.25
4.5
9.5
UNIT
ns
pF
pF
ORDERING INFORMATION
PACKAGES
48-Pin Plastic TSSOP Type II
TEMPERATURE RANGE OUTSIDE NORTH AMERICA
–40°C to +85°C
CBT6820 DGG
NORTH AMERICA
CBT6820 DGG
DWG NUMBER
SOT362–1
1999 Apr 05
2 853–2152 21177


Part Number CBT6832
Description INTEGRATED CIRCUITS
Maker NXP
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CBT6832 Datasheet PDF






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