Download 87C52 Datasheet PDF
NXP Semiconductors
87C52
DESCRIPTION The Philips 80C51/87C51/80C52/87C52 is a high-performance static 80C51 design fabricated with Philips high-density CMOS technology with operation from 2.7 V to 5.5 V. The 8x C51 and 8x C52 contain a 128 × 8 RAM and 256 × 8 RAM respectively, 32 I/O lines, three 16-bit counter/timers, a six-source, four-priority level nested interrupt structure, a serial I/O port for either multi-processor munications, I/O expansion or full duplex UART, and on-chip oscillator and clock circuits. In addition, the device is a low power static design which offers a wide range of operating frequencies down to zero. Two software selectable modes of power reduction- idle mode and power-down mode are available. The idle mode freezes the CPU while allowing the RAM, timers, serial port, and interrupt system to continue functioning. The power-down mode saves the RAM contents but freezes the oscillator, causing all other chip functions to be inoperative. Since the design is static, the clock can be...