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74LVC2G17 Datasheet NXP

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NXP · 74LVC2G17 File Size : 96.62KB · 2 hits

Features and Benefits


• Wide supply voltage range from 1.65 V to 5.5 V
• 5 V tolerant input/output for interfacing with 5 V logic
• High noise immunity
• Complies with JEDEC standard:
  – JESD8-7 (1.65 V to 1.95 V)
  – JESD8-5 (2.3 V to 2.7 V)
  – JESD8B/JESD36 (2.7 V to 3.6 V).
• ESD protection:
  – HBM EIA/JESD22-A114-B exceed.

74LVC2G17 74LVC2G17 74LVC2G17
TAGS
Dual
non-inverting
Schmitt-trigger
74LVC2G125
74LVC2G125-Q100
74LVC2G126

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