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74LVC126A - Quad buffer/line driver

Datasheet Summary

Description

The 74LVC126A consists of four non-inverting buffers/line drivers with 3-state outputs, which are controlled by the output enable input (nOE).

A LOW at nOE causes the outputs to assume a high-impedance OFF-state.

Inputs can be driven from either 3.3 V or 5 V devices.

Features

  • 5 V tolerant inputs/outputs for interfacing with 5 V logic.
  • Wide supply voltage range from 1.2 V to 3.6 V.
  • CMOS low power consumption.
  • Direct interface with TTL levels.
  • Complies with JEDEC standard:.
  • JESD8-7A (1.65 V to 1.95 V).
  • JESD8-5A (2.3 V to 2.7 V).
  • JESD8-C/JESD36 (2.7 V to 3.6 V).
  • ESD protection:.
  • HBM JESD22-A114F exceeds 2000 V.
  • MM JESD22-A115B exceeds 200 V.
  • CDM JESD22-C101E exceeds 1000 V.
  • Specified from 40 C to +85 C.

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Datasheet preview – 74LVC126A

Datasheet Details

Part number 74LVC126A
Manufacturer NXP
File Size 128.00 KB
Description Quad buffer/line driver
Datasheet download datasheet 74LVC126A Datasheet
Additional preview pages of the 74LVC126A datasheet.

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Full PDF Text Transcription

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74LVC126A Quad buffer/line driver with 5 V tolerant input/outputs; 3-state Rev. 8 — 8 April 2014 Product data sheet 1. General description The 74LVC126A consists of four non-inverting buffers/line drivers with 3-state outputs, which are controlled by the output enable input (nOE). A LOW at nOE causes the outputs to assume a high-impedance OFF-state. Inputs can be driven from either 3.3 V or 5 V devices. When disabled, up to 5.5 V can be applied to the outputs. 2. Features and benefits  5 V tolerant inputs/outputs for interfacing with 5 V logic  Wide supply voltage range from 1.2 V to 3.6 V  CMOS low power consumption  Direct interface with TTL levels  Complies with JEDEC standard:  JESD8-7A (1.65 V to 1.95 V)  JESD8-5A (2.3 V to 2.7 V)  JESD8-C/JESD36 (2.7 V to 3.
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