74LV14
description
The 74LV14 is a low-voltage Si-gate CMOS device that is pin and function patible with 74HC14 and 74HCT14.
The 74LV14 provides six inverting buffers with Schmitt-trigger input. It is capable of transforming slowly-changing input signals into sharply defined, jitter-free output signals.
The inputs switch at different points for positive and negative-going signals. The difference between the positive voltage VT+ and the negative voltage VT- is defined as the input hysteresis voltage VH.
2. Features and benefits
- Wide operating voltage: 1.0 V to 5.5 V
- Optimized for low voltage applications: 1.0 V to 3.6 V
- Accepts TTL input levels between VCC = 2.7 V and VCC = 3.6 V
- Typical output ground bounce < 0.8 V at VCC = 3.3 V and Tamb = 25 C
- Typical HIGH-level output voltage (VOH) undershoot: > 2 V at VCC = 3.3 V and
Tamb = 25 C
- ESD protection:
- HBM JESD22-A114F exceeds 2000 V
- MM JESD22-A115-A exceeds 200 V
- Multiple package options
- Specified from
- 40 C to +85 C and...
