74HC4040 counter equivalent, 12-stage binary ripple counter.
* Complies with JEDEC standard no. 7A
* Input levels:
* For 74HC4040: CMOS level
* For 74HCT4040: TTL level
* ESD protection:
* HBM JESD22-A114F e.
* Frequency dividing circuits
* Time delay circuits
* Control counters
4. Ordering information
Table 1. Or.
The 74HC4040; 74HCT4040 is a 12-stage binary ripple counter with a clock input (CP), an overriding asynchronous master reset input (MR) and twelve parallel outputs (Q0 to Q11). The counter advances on the HIGH-to-LOW transition of CP. A HIGH on MR cl.
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