Download 74AUP1G02 Datasheet PDF
74AUP1G02 page 2
Page 2
74AUP1G02 page 3
Page 3

74AUP1G02 Description

The 74AUP1G02 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS patible TTL families. Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall times across the entire VCC range from 0.8 V to 3.6 V. This device ensures a very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6.

74AUP1G02 Key Features

  • Typ 17.0 5.1 3.7 3.0 2.4 2.2 0.8 3.4 4.3
  • Unit ns ns ns ns ns ns pF pF pF