74AHC139 - Dual 2-to-4 line decoder/demultiplexer

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NXP

74AHC139 Dual 2-to-4 line decoder/demultiplexer by NXP - Datasheet Preview — Datasheet preview – 74AHC139

Datasheet Details

Part number	74AHC139
Manufacturer	NXP
File Size	582.83 KB
Description	Dual 2-to-4 line decoder/demultiplexer
Datasheet	74AHC139 Datasheet
Additional preview pages of the 74AHC139 datasheet.

Product details

Description

74AHC139; 74AHCT139 The 74AHC/AHCT139 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL).They are specified in compliance with JEDEC standard no.7A.The 74AHC/AHCT139 are high-speed, dual 2-to-4 line decoder/demultiplexers.This device has two independent decoders, each accepting two binary weighted inputs (nA0 and nA1) and providing four mutually exclusive active LOW outputs (nY0 to nY3).Each decoder has an active LOW enable input (nE).When nE i

Features

ESD protection: HBM EIA/JESD22-A114-A exceeds 2000 V MM EIA/JESD22-A115-A exceeds 200 V CDM EIA/JESD22-C101 exceeds 1000 V.
Balanced propagation delays.
All inputs have Schmitt trigger actions.
Inputs accept voltages higher than VCC.
For AHC only: operates with CMOS input levels.
For AHCT only: operates with TTL input levels.
Specified from.
40 to +85 °C and.
40 to +125 °C.

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Published: Apr 3, 2005 |