NIKO-SEM
P-Channel Logic Level Enhancement
P4004ED
Mode Field Effect Transistor
TO-252(DPAK)
Halogen-Free & Lead-Free
Drain-Source On-State
Resistance1
Forward Transconductance1
RDS(ON)
gfs
VGS = -5V, ID = -8A
VGS = -7V, ID = -8A
VGS = -10V, ID = -10A
VDS = -10V, ID = -10A
DYNAMIC
65 73
35 50 mΩ
30 40
20 S
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Total Gate Charge2
Total Gate Charge2
Gate-Source Charge2
Gate-Drain Charge2
Gate Resistance
Turn-On Delay Time2
Rise Time2
Turn-Off Delay Time2
Fall Time2
Ciss
Coss
Crss
VGS = 0V, VDS = -20V, f = 1MHz
Qg(VGS = -10V)
Qg(VGS =-4.5V)
Qgs
Qgd
VDS = 0.5V(BR)DSS, ID = -18A
Rg VGS = 0V, VDS = 0V, f = 1MHz
td(on)
tr
VDS = -20V, RL = 2Ω
td(off)
ID ≅ -10A, VGS = -10V, RGS = 6Ω
tf
1090
175
91
17
8.5
5.5
3
4.95
6
16
26
10
pF
nC
Ω
nS
SOURCE-DRAIN DIODE RATINGS AND CHARACTERISTICS (TJ = 25 °C)
Continuous Current
Forward Voltage1
IS
VSD IF = -1A, VGS = 0V
Reverse Recovery Time
Reverse Recovery Charge
trr
IF = -10 A, dlF/dt = 100A / µS
Qrr
1Pulse test : Pulse Width ≤ 300 µsec, Duty Cycle ≤ 2％.
2Independent of operating temperature.
15.5
7.9
-21
-1
A
V
nS
nC
REV 1.1
Sep-16-2010
2
