UPD411-1 memory equivalent, fully decoded random access memory.
of the fJPD411 family are:
* Low Standby Power
* 4096 words x 1 bit Organization
* A single low-capacitance high level clock input with solid ±.
where very low cost and large bit storage are important design objectives. The J,lPD411 Family is designed using dynamic.
Image gallery
TAGS
Download (Size : 415.23KB)