UPD17016 Datasheet | NEC

FEATURES - 17K architecture: general-purpose register method - Program memory (ROM) 8 KB (3836 × 16 bits) : µPD17016 16 KB (7932 × 16 bits) : µPD17017 - General-purpose data memory (RAM) 320 × 4 bits: µPD17016 432 × 4 bits: µPD17017 - Instruction execution time 4.44 µs (with 4.5-MHz crystal resonator) - Decimal operation - Table reference - Hardware for PLL frequency synthesizer Dual modulus prescaler (150 MHz max.), programmable divider, charge pump - A wealth of peripheral hardware General-purpose I/O ports, LCD controller/driver, serial interface, A/D converter, D/A converter (PWM output), BEEP output, frequency counter - Interrupt External: 1 Internal: 1 - Power-ON reset, reset by CE pin, and power failure detection circuit - Power-saving CMOS - Supply voltage: VDD = 5 V± 10% Unless otherwise specified, the µPD17017 is explained as the representative model in this document. The information in this document is subject to change without notice. Document No. U10664EJ2V0DS00 (2nd edition) Date Published September 1996 P Printed in Japan The mark shows major revised points. © µPD17016, 17017 ORDERING INFORMATION Part Number Package 80-pin plastic QFP (14 × 20 mm) 80-pin plastic QFP (14 × 20 mm) µ PD17016GF- ××× -3B9 µ PD17017GF- ××× -3B9 Remark ××× indicates a ROM code number. FUNCTIONAL OUTLINE OF µPD17016 AND 17017 Item Program memory (ROM) - - Function 8 KB (3836 × 16 bits) : µPD17016 16 KB (7932 × 16 bits) : µPD17017 All internal ROM areas can be referenced as a table. 320 × 4 bits : µPD17016 432 × 4 bits : µPD17017 General register: 16 × 4 bits 4.44 µs (with 4.5-MHz crystal resonator) 7 levels (stack can be manipulated) I/O port : 16 pins Input port : 8 pins Output port : 9 pins (+8: LCD segment pin) 1 pin Selectable frequency (200 Hz, 1 k Hz, 3 k Hz) 30 segments, 2 mons 1/2 duty, 1/2 bias, frame frequency: 125 MHz, drive voltage: VDD, segment pins multiplexed with key source pins: 16 8 pins can be used as output port pins (4 pins can be set in...