UPD17015 Datasheet | NEC

features a prescaler that can operate at frequencies up to 220 MHz, a PLL synthesizer, and an LCD controller/driver, all configured in one chip. Since, for its CPU, the µPD17015 adopts a 17K architecture which allows data memory to be manipulated directly without accumulators, programming efficiency is enhanced. Each instruction is 16 bits (one word) long. Since this microcontroller can operate at low voltages (VDD = 1.8 to 3.6 V), it is ideal for controlling portable, batterypowered units such as portable radios, headphone stereo sets, and radio-cassette players. FEATURES - - - - - 17K architecture Program memory (ROM) Data memory (RAM) General-purpose I/O ports - LCD controller/driver - Clock generator port : General registers : 3K bytes (1528 × 16 bits) : 97 × 4 bits : 12 : 9 segments × 4 mons Minimum required peripheral hardware is built into the chip. - PLL frequency synthesizer and 220-MHz (MAX.) prescaler - Low-voltage operation ORDERING INFORMATION Part number : VDD = 1.8 to 3.6 V (TA = - 10 to +50 °C) Package 38-pin plastic shrink SOP (300 mil) µPD17015GS-×××-GJG Remark ××× is a ROM code number. The information in this document is subject to change without notice. Document No. U10416EJ1V0DS00 (1st edition) Date Published September 1995 P Printed in Japan Major changes in this revision are indicated by stars (5) in the margins. © µPD17015 FUNCTION OVERVIEW Item Program memory (ROM) General-purpose data memory Instruction execution time - 3K bytes (1528 × 16 bits) - 97 × 4 bits - 53.3 µs (when 75 k Hz crystal is used) - 1 level - I/O - Input only : 2 ports : 3 ports Function Stack levels General-purpose ports - Output only : 7 ports BEEP output LCD controller/driver 1 (3 k Hz) - 9 segments, 4 mons - 1/4 duty, 1/2 bias, frame frequency 62.5 Hz, driving voltage 3.0 V (TYP.) Timers 2 channels Basic timer 0 : 125 ms Basic timer 1 : 5 ms Reset - Power-on reset - Reset with the CE pin (by switching the CE pin from low to...