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MC68EC040V - Microprocessor

This page provides the datasheet information for the MC68EC040V, a member of the MC68EC040 Microprocessor family.

Description

of table descriptors.

0 = Read and write accesses permitted.

1 = Write accesses not permitted.

Features

  • of the MC68EC040 include:.
  • MC68040-Compatible Integer Execution Unit.
  • 4-Kbyte Instruction Cache and 4-Kbyte Data Cache Accessible Simultaneously.
  • 32-Bit, Nonmultiplexed External Address and Data Buses with Synchronous Bursting Interface.
  • User-Object-Code Compatible with All M68000 Microprocessors.
  • Concurrent Integer Unit, ACU, and Bus Controller Operation Maximizes Throughput.
  • Low-Latency Bus Accesses for Reduced Cache-Miss Penalty.

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Datasheet preview – MC68EC040V

Datasheet Details

Part number MC68EC040V
Manufacturer Motorola Semiconductor
File Size 116.75 KB
Description Microprocessor
Datasheet download datasheet MC68EC040V Datasheet
Additional preview pages of the MC68EC040V datasheet.

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Full PDF Text Transcription

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w w S a t APPENDIX B a MC68EC040 .D w e e h U 4 t m o .c REV2.2 (11/02/99) NOTE Rev. 2.2 contains timing information for 40 MHz operation. Refer to chang bars. Some TBD values will be filled in shortly. All references to MC68EC040 also apply to the MC68EC040V. Refer to Appendix C MC68040V and MC68EC040V for more information on the MC68EC040V. The MC68EC040 is Motorola's third generation of M68000-compatible, high-performance, 32-bit microprocessors. The MC68EC040 is an embedded controller employing a highly integrated architecture to provide very high performance in a monolithic HCMOS device. The MC68EC040 integrates an MC68040-compatible integer unit, an access control unit (ACU), and independent 4-Kbyte instruction and data caches.
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