SN54LS257B Datasheet | Motorola Semiconductor

DESCRIPTION The LS257B and LS258B are Quad 2-Input Multiplexers with 3-state outputs. They select four bits of data from two sources each under control of a mon Data Select Input. When the Select Input is LOW, the I0 inputs are selected and when Select is HIGH, the I1 inputs are selected. The data on the selected inputs appears at the outputs in true (noninverted) form for the LS257B and in the inverted form for the LS258B. The LS257B and LS258B are the logic implementation of a 4-pole, 2-position switch where the position of the switch is determined by the logic levels supplied to the Select Input. The logic equations for the outputs are shown below: LS257B Za = E0 - (I1a - S + I0a - S) Zb = E0 - (I1b - S + I0b - S) Zc = E0 - (I1c - S + I0c - S) Zd = E0 - (I1d - S + I0d - S) When the Output Enable Input (E0) is HIGH, the outputs are forced to a high impedance “off” state. If the outputs are tied together, all but one device must be in the high impedance state to avoid high currents that would exceed the maximum ratings....