SN54LS132 Datasheet | Motorola Semiconductor

SN54/74LS132 QUAD 2-INPUT SCHMITT TRIGGER NAND GATE The SN54 / 74LS132 contains four 2-Input NAND Gates which accept standard TTL input signals and provide standard TTL output levels. They are capable of transforming slowly changing input signals into sharply defined, jitterfree output signals. Additionally, they have greater noise margin than conventional NAND Gates. Each circuit contains a 2-input Schmitt trigger followed by a Darlington level shifter and a phase splitter driving a TTL totem pole output. The Schmitt trigger uses positive feedback to effectively speed-up slow input transitions, and provide different input threshold voltages for positive and negative-going transitions. This hysteresis between the positive-going and negative-going input thresholds (typically 800 m V) is determined internally by resistor ratios and is essentially insensitive to temperature and supply voltage variations. As long as one input remains at a more positive voltage than VT+ (MAX), the gate will respond to the transitions of the other input as shown in Figure 1. QUAD 2-INPUT SCHMITT TRIGGER NAND GATE LOW POWER SCHOTTKY J SUFFIX CERAMIC CASE 632-08 14 1 LOGIC AND CONNECTION DIAGRAM DIP (TOP VIEW) V CC 14 13 12 11 10 9 8 14 1 N SUFFIX PLASTIC CASE 646-06 14 1 1 2 3 4 5 6 7 GND D SUFFIX SOIC CASE 751A-02 ORDERING INFORMATION SN54LSXXXJ SN74LSXXXN SN74LSXXXD Ceramic Plastic SOIC 5 V = 5 V CC , OUTPUT VOLTAGE (VOLTS) T = 25 C A 4 ° 0 0 0.4 0.95 1.2 1.8 2 V , INPUT VOLTAGE (VOLTS) IN Figure 1. VIN versus VOUT Transfer Function FAST AND LS TTL DATA 5-212 SN54/74LS132 GUARANTEED OPERATING RANGES Symbol VCC TA IOH IOL Supply Voltage Operating Ambient Temperature Range Output Current - High Output Current - Low Parameter 54 74 54 74 54, 74 54 74 Min 4.5 4.75 - 55 0 Typ 5.0 5.0 25 25 Max 5.5 5.25 125 70 - 0.4 4.0 8.0 Unit V °C m A m A DC CHARACTERISTICS OVER OPERATING TEMPERATURE RANGE (unless otherwise specified) Limits Symbol VT+ VT- VT + - VT- VIK VOH...