SPC5200CBV400 - MPC5200 Hardware Specifications

Motorola

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Datasheet Details

Part number	SPC5200CBV400
Manufacturer	Motorola
File Size	1.37 MB
Description	MPC5200 Hardware Specifications
Datasheet	SPC5200CBV400_MotorolaInc.pdf

SPC5200CBV400 Product details

Description

60 System Design Information 69 Ordering Information 74 Document Revision History 75 The information in this document is subject to change.For the latest data on the MPC5200, visit www.mobilegt.com and proceed to the MPC5200 Product Summary Page.1 Overview The MPC5200 integrates a high performance MPC603e series G2_LE core with a rich set of peripheral functions focused on communications and systems integration.The G2_LE core design is based on the PowerPC® core architecture.MPC5200 inco

Features

s MPC603e series G2_LE core.
Superscalar architecture 760 MIPS at 400 MHz (-40 to +85 oC) 16 k Instruction cache, 16 k Data cache Double precision FPU Instruction and Data MMU Standard and Critical interrupt capability up to 132-MHz operation SDRAM and DDR SDRAM support 256-MByte addressing range per CS, two CS available 32-bit data bus Built-in initialization and refr.

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Published: Jun 7, 2005 |