MCM69C433
Key Features
- 16K Entries 240 ns Match Time Mask Register to “Don’t Care” Selected Bits O Depth Expansion by Cascading Multiple Devices IC 66 MHz Maximum Clock Rate EM S Programmable Match and Output Field Widths LE Concurrent Matching of Virtual Path Circuits and Virtual Connection A Circuits in ATM Mode SC Separate Ports for Control and Match Operations E E is Empty 450 ns Insertion Time if 1 of 14 Entry Queue Locations FR 120 ms Initialization Time After Fast Insertion (at Power–Up Only) BY Single 3.3 V ±5% Supply ED IEEE Standard 1149.1 Test Port (JTAG) V I 100–Pin TQFP Package H
