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MC14553 - 3-Digit BCD Counter

Features

  • cy scanning clock which drives the multiplexer output selector. The frequency of the oscillator can be controlled externally by a capacitor between pins 3 and 4, or it can be overridden and driven with an external clock at pin 4. Multiple devices can be cascaded using the overflow output, which provides one LATCH ENABLE 10 CLOCK 12 pulse for every 1000 counts. The Master Reset input, when taken high, initializes the three BCD counters and the multiplexer scanning circuit. While Master Reset is.

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Full PDF Text Transcription

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MOTOROLA SEMICONDUCTOR TECHNICAL DATA MC14553B 3-Digit BCD Counter The MC14553B 3–digit BCD counter consists of 3 negative edge triggered BCD counters that are cascaded synchronously. A quad latch at the output of each counter permits storage of any given count. The information is then time division multiplexed, providing one BCD number or digit at a time. Digit select outputs provide display control. All outputs are TTL compatible. An on–chip oscillator provides the low–frequency scanning clock which drives the multiplexer output selector. This device is used in instrumentation counters, clock displays, digital panel meters, and as a building block for general logic applications.
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