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Dual Modulus Prescaler
These devices are two–modulus prescalers which will divide by 5 and 6, 8 and 9, and 10 and 11, respectively. A MECL–to–MTTL translator is provided to interface directly with the MC12014 Counter Control Logic. In addition, there is a buffered clock input and MECL bias voltage source. • MC12009 480 MHz ( 5/6), MC12011 550 MHz ( 8/9), MC12013 550 MHz ( 10/11) • MECL to MTTL Translator on Chip
MC12009 MC12011 MC12013
MECL PLL COMPONENTS DUAL MODULUS PRESCALER
SEMICONDUCTOR TECHNICAL DATA
B
B
B
• • • • •
MECL and MTTL Enable Inputs 5.0 or –5.2 V Operation* Buffered Clock Input — Series Input RC Typ, 20 Ohms and 4 pF VBB Reference Voltage 310 Milliwatts (Typ)
* When using a 5.0 V supply, apply 5.
MC12013 Datasheet
