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MC10H606 - Registered Hex TTL/PECL Translator

Features

  • differential PECL outputs as well as a choice between either a differential PECL clock input or a TTL clock input. The asynchronous master reset control is a PECL level input. With its differential PECL outputs and TTL inputs the H606 device is ideally suited for the transmit function of a HPPI bus type board.
  • to.
  • board interface.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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MOTOROLA SEMICONDUCTOR TECHNICAL DATA Registered Hex TTL/PECL Translator The MC10/100H606 is a 6–bit, registered, single supply TTL to PECL translator. The device features differential PECL outputs as well as a choice between either a differential PECL clock input or a TTL clock input. The asynchronous master reset control is a PECL level input. With its differential PECL outputs and TTL inputs the H606 device is ideally suited for the transmit function of a HPPI bus type board–to–board interface application. The on chip registers simplify the task of synchronizing the data between the two boards.