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MC10161 - Binary to 1-8 Decoder

Download the MC10161 datasheet PDF. This datasheet also covers the MC10161L variant, as both devices belong to the same binary to 1-8 decoder family and are provided as variant models within a single manufacturer datasheet.

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Note: The manufacturer provides a single datasheet file (MC10161L_MotorolaInc.pdf) that lists specifications for multiple related part numbers.

📁 Similar Datasheet

Part Number Description Manufacturer
MC10161 Binary to 1-8 Decoder(Low) ON Semiconductor
MC10162 Binary to 1-8 Decoder ON Semiconductor
MC10164 8-Line Multiplexer ON Semiconductor
MC10166 5-Bit Magnitude Comparator ON Semiconductor
MC10101 Quad OR/NOR Gate ON Semiconductor

Other Datasheets by Motorola Semiconductor (now NXP Semiconductors)

Part Number Description
MC10160 12-Bit Parity Generator-Checker
MC10162 Binary to 1-8 Decoder(High)
MC10164 8-Line Multiplexer
MC10165 8-Input Priority Encoder
MC10168 Quad Latch

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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MOTOROLA SEMICONDUCTOR TECHNICAL DATA Binary to 1-8 Decoder (Low) The MC10161 is designed to decode a three bit input word to a one of eight line output. The selected output will be low while all other outputs will be high. The enable inputs, when either or both are high, force all outputs high. The MC10161 is a true parallel decoder. No series gating is used internally, eliminating unequal delay times found in other decoders. This design provides the identical 4 ns delay from any address or enable input to any output. A complete mux/demux operation on 16 bits for data distribution is illustrated in Figure 1. This system, using the MC10136 control counters, has the capability of incrementing, decrementing or holding data channels.