V54C3128164VAT Datasheet High Performance SDRAM

Manufacturer: Mosel Vitelic

V54C3128164VAT high performance sdram by Mosel Vitelic - Datasheet Preview

Datasheet Details

Part number	V54C3128164VAT
Manufacturer	Mosel Vitelic
File Size	621.08 KB
Description	High Performance SDRAM
Datasheet	V54C3128164VAT Datasheet

General Description

The V54C3128164VAT is a four bank Synchronous DRAM organized as 4 banks x 2Mbit x 16.

The V54C3128164VAT achieves high speed data transfer rates up to 166 MHz by employing a chip architecture that prefetches multiple bits and then synchronizes the output data to a system clock All of the control, address, data input and output circuits are synchronized with the positive edge of an externally supplied clock.

Operating the four memory banks in an interleaved fashion allows random access operation to occur at higher rate than is possible with standard DRAMs.

Overview

MOSEL VITELIC w w w .

D a t a S h e e t 4 U V54C3128164VAT HIGH PERFORMANCE 166/143/133/125MHz .

c o m 3.3 VOLT 8M X 16 SYNCHRONOUS DRAM 4 BANKS X 2Mbit X 16 PRELIMINARY 6 System Frequency (fCK) Clock Cycle Time (tCK3 ) Clock Access Time (tAC3) CAS Latency = 3 Clock Access Time (tAC2) CAS Latency = 2 Clock Access Time (tAC1) CAS Latency = 1 166 MHz 6 5.4 ns 5.4 ns 10.5 ns 7 143 MHz 7 ns 5.4 ns 5.5 ns 10.5 ns 75 133 MHz 7.5 ns 5.4 ns 6 ns 10.5 ns 8PC 125 MHz 8 ns 6 ns 6 ns 10.

Key Features

s 4 banks x 2Mbit x 16 organization s High speed data transfer rates up to 166 MHz s Full Synchronous Dynamic RAM, with all signals referenced to clock rising edge s Single Pulsed RAS Interface s Data Mask for Read/Write Control s Four Banks controlled by BA0 & BA1 s Programmable CAS Latency:1, 2, 3 s Programmable Wrap Sequence: Sequential or Interleave s Programmable Burst Length: 1, 2, 4, 8 for Sequential Type 1, 2, 4, 8 for Interleave Type s Multiple Burst Read with Single Write Operation s A.

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