M5M5T5672TG-20 sram equivalent, 18874368-bit(262144-word by 72-bit) network sram.
* Fully registered inputs and outputs for pipelined operation
* Fast clock speed: 200 MHz
* Fast access time: 3.2 ns
* Single 2.5V
–5% and.
The M5M5T5672TG is a family of 18M bit synchronous SRAMs organized as 262144-words by 72-bit. It is designed to eliminate dead bus cycles when turning the bus around between reads and writes, or writes and reads. Renesas's SRAMs are fabricated with h.
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