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M32000D4BFP-80 - SINGLE-CHIP 32-BIT CMOS MICROCOMPUTER

Description

The M32000D4BFP-80 is a new generation microcomputer with a 32-bit CPU and built-in high capacity DRAM.

Using this device it is possible to implement the complex applications of the multimedia age with high performance and low power consumption.

Features

  • CPU M32R family CPU core.
  • Pipeline 5 steps.
  • Basic bus cycle 12.5 ns (at internal 80 MHz).
  • Logical address space 4G-byte linear.
  • External bus data bus: 16 bits address bus: 24 bits.
  • Internal DRAM 16M bits (2M bytes).
  • Cache 4K bytes (direct map).
  • Register configuration general-purpose registers: 32 bits x 16 control registers: 32 bits x 5.
  • Instruction set 83 instructions/6 addressing modes.
  • Ins.

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Full PDF Text Transcription (Reference)

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MITSUBISHI MICROCOMPUTERS M32000D4BFP-80 SINGLE-CHIP 32-BIT CMOS MICROCOMPUTER DESCRIPTION The M32000D4BFP-80 is a new generation microcomputer with a 32-bit CPU and built-in high capacity DRAM. Using this device it is possible to implement the complex applications of the multimedia age with high performance and low power consumption. The M32000D4BFP-80 contains 2M bytes of DRAM and 4K bytes of cache memory. The CPU is implemented with a RISC architecture and has a high performance figure of 62.9 MIPS (at an internal clock rate of 80 MHz). Memory for main storage is provided internally to the device eliminating external memory and associated control circuits thus reducing overall system noise and power consumption. The CPU, internal DRAM and cache memory are connected by a 128-bit, 12.
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