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256K x 36 SSRAM
Flow-Through, Synchronous Burst SRAM
FEATURES
Organized 256K x 36 Fast Clock and OE access times Single +3.3V +0.3V/-0.165V power supply (VDD) SNOOZE MODE for reduced-power standby Common data inputs and data outputs Individual BYTE WRITE control and GLOBAL WRITE Three chip enables for simple depth expansion and address
pipelining Clock-controlled and registered addresses, data I/Os and
control signals Internally self-timed WRITE cycle Burst control (interleaved or linear burst) Automatic power-down for portable applications Low capacitive bus loading 100-lead TQFP package for high density, high speed
RoHs compliant options available
OPTIONS
Timing 7.5ns/8.5ns/117MHz 8.5ns/10ns/100MHz 10ns/15ns/66MHz
MARKING
-7.5 -8.